Method and system for testing an integrated circuit
US11114274B2 · kind B2 · utility
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6References
28Claims
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Key dates
| Filing date | Dec 23, 2019 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Jan 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/2817
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.