Source clock recovery in wireless video systems
US11115693B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2019 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Mar 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/43637
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems, apparatuses, and methods for performing efficient video transmission are disclosed. In a video processing system, a transmitter sends encoded pixel data to a receiver. The receiver stores the encoded pixel data in a buffer at an input data rate. A decoder of the receiver reads the pixel data from the buffer at an output data rate. Each of a transmitter and the receiver maintains a respective synchronization counter. When detecting a start of a frame, each of the transmitter and the receiver stores a respective frame start count as a copy of a current value of the respective synchronization counter. The transmitter sends its frame start count to the receiver. The receiver determines a difference between the respective frame start counts, and adjusts the decoding rate based on the difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.