Processor to pre-empt voltage ramps for exit latency reductions
US11119555B2 · kind B2 · utility
0Cited by
32References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Mar 18, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor includes a plurality of cores and a power controller. This power controller in turn may include a voltage ramp logic to pre-empt a voltage ramp of a voltage regulator from a first voltage to a second voltage, responsive to a request for a second core to exit a low power state. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.