Semiconductor memory device using shared data line for read/write operation
US11120868B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Dec 5, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.