Fan-out semiconductor package
US11121090B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Mar 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/214
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention provides a fan-out semiconductor package, the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.