Memory system
US11126379B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 29, 2020 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | May 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory device including a plurality of segments; a processor configured to generate a Read-Modify-Write (RMW) command on a target segment address corresponding to a target segment among the plurality of segments; a scheduler configured to receive the RMW command from the processor and schedule the RMW command; and a RMW unit configured to execute the RMW command on the memory device according to control of the scheduler, wherein the scheduler compares, when a plurality of RMW commands received from the processor are pending, target segment addresses of the plurality of RMW commands to re-order the plurality of RMW commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.