Method of programming 3D memory device and related 3D memory device
US11127464B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Mar 23, 2020 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | Mar 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a channel-stacked memory device which includes a first channel stacked on a second channel, the first channel is programmed in a bottom-to-top direction and the second channel is programmed in a top-to-bottom direction. The electrons in the first channel may be drained by a bit line, while the electrons in the second channel may be drained by a well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.