Compensation for device property variation according to wafer location
US11128293B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2020 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | Jul 27, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/447
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and devices are disclosed for compensating for device property variations across a wafer. The method comprises determining an output of a first device based on an input and determining an output of a second device based on the input. The second device is located at a different position with respect to a center of the wafer than a position of the first device with respect to the center of the wafer. The method further comprises determining a difference between the output of the first device and the output of the second device, the difference arising at least in part from the difference in position of the first and second devices. The method further comprises altering the first device such that the output of the first device based on the input substantially matches the output of the second device based on the input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.