Patent · US Active

Instruction handling for accumulation of register results in a microprocessor

US11132198B2 · kind B2 · utility

1Cited by

7References

25Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Brian W. Thompto · Austin, US
Maarten J. Boersma · Holzgerlingen, DE
Andreas Wagner · Eppelheim, DE
Jose E. Moreira · Dobbs Ferry, US
Hung Q. Le · Austin, US
Silvia M. Mueller · Altdorf, DE
Dung Q. Nguyen · Austin, US

Key dates

Filing date	Aug 29, 2019
Grant date	Sep 28, 2021
Priority date	—
Expiry date	Aug 29, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/384
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computer system, processor, and method for processing information is disclosed that includes at least one computer processor; a main register file associated with the at least one processor, the main register file having a plurality of entries for storing data, one or more write ports to write data to the main register file entries, and one or more read ports to read data from the main register file entries; one or more execution units including a dense math execution unit; and at least one accumulator register file having a plurality of entries for storing data. The results of the dense math execution unit in an aspect are written to the accumulator register file, preferably to the same accumulator register file entry multiple times, and the data from the accumulator register file is written to the main register file.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.