Memory controller to determine an optimal read voltage, operating method thereof and storage device including the same
US11133069B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2019 |
| Grant date | Sep 28, 2021 |
| Priority date | — |
| Expiry date | Oct 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller controlling a memory device including a plurality of memory cells includes a read operation controller performing a soft read operation on the plurality of memory cells by using a plurality of soft read voltages determined based on a default read voltage when a read operation for reading the plurality of memory cells by the default read voltage fails, and reading the plurality of memory cells by using an optimal read voltage determined according to a result of performing the soft read operation, and a read voltage setting circuit determining the optimal read voltage using voltage candidates being soft read voltages corresponding to at least two voltage intervals, among a plurality of voltage intervals determined according to the plurality of soft read voltages, the voltage candidates selected in ascending order of a number of memory cells having threshold voltages belonging to each of the plurality of voltage intervals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.