Directed interrupt for multilevel virtualization
US11138139B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2020 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Feb 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/542
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interrupt signal is provided to a first guest operating system. A bus attachment device receives an interrupt signal from a bus connected module with an interrupt target ID identifying a processor assigned for use by the guest operating system as a target processor for handling the interrupt signal. The bus attachment device checks whether the target processor is scheduled for usage by the guest operating system. If the target processor is not scheduled for usage, the bus attachment device forwards the interrupt signal using broadcasting and updates a forwarding vector entry stored in a memory section assigned to a second guest operating system hosting the first guest operating system. The update is used for indicating to the first operating system that there is a first interrupt signal addressed to the interrupt target ID to be handled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.