Memory system and operating method of the memory system
US11139010B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2020 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Aug 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2272
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a method for operating an interface circuit of a memory device. The method includes receiving a command from a controller; determining whether the command is for a semiconductor memory or the interface circuit, the semiconductor memory operatively coupled to the interface circuit; and when it is determined that the command is for the interface circuit, performing a blocking operation to block transfer of the command between the interface circuit and the semiconductor memory and performing an internal operation of the interface circuit. The internal operation includes a signal controlling operation, a training operation, a read operation, an on-die termination operation, a ZQ calibration operation, or a driving force control operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.