Memory device with a memory repair mechanism and methods for operating the same
US11139045B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2019 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Nov 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatuses and systems related to managing access to a memory device are described. A memory device includes fuses and latches for storing a repair segment locator and a repair address for each repair of one or more defective memory cells. A segment-address determination circuit generate an active segment address based on the repair address according to the repair segment locator and an address for a read or a write operation. A comparator circuitry is configured to determine whether the active segment address matches the address for the read or the write operation for replacing the one or more defective memory cells with the plurality of redundant cells when the address for the read/write operation corresponds to the one or more defective memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.