Field-effect transistors with semiconducting gate
US11139374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2019 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Aug 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/221
Abstract
Field-effect transistors (FETs) are described that comprise a semiconducting gate (SG) layer, referred to herein as SG-FETs. In one or more embodiments, the FETs can include a channel layer and a SG layer capacitively coupled to the channel layer. The SG layer has an embedded voltage-clamping function that provides internal gate over voltage protection without an additional protection circuit. The embedded voltage-clamping function is based on the SG layer having a maximum effective gate voltage that is clamped to the depletion threshold of the SG layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.