Jing Chen
25Patents
5h-index
20Co-inventors
65Inventor score
Filing activity: Nov 29, 2006 → Nov 29, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7932539B2 | Enhancement-mode III-N devices, circuits, and methods | Electricity | 55 | Active |
| US8502323B2 | Reliable normally-off III-nitride active device structures, and related methods and systems | Electricity | 38 | Active |
| US7972915B2 | Monolithic integration of enhancement- and depletion-mode AlGaN/GaN HFETs | Electricity | 27 | Active |
| US8044432B2 | Low density drain HEMTs | Electricity | 13 | Active |
| US8564020B2 | Transistors and rectifiers utilizing hybrid electrodes and methods of fabricating the same | Electricity | 10 | Active |
| US8937336B2 | Passivation of group III-nitride heterojunction devices | Electricity | 5 | Active |
| US8809987B2 | Normally-off III-nitride metal-2DEG tunnel junction field-effect transistors | Electricity | 5 | Active |
| US10404251B2 | Power device with integrated gate driver | Electricity | 4 | Active |
| US10270436B2 | Transistors having on-chip integrated photon source or photonic-ohmic drain to facilitate de-trapping electrons trapped in deep traps of transistors | Electricity | 4 | Active |
| US9160326B2 | Gate protected semiconductor devices | Electricity | 2 | Active |
| US11935950B2 | High voltage transistor structure | Electricity | 1 | Active |
| US10553687B2 | Semiconductor device having conductive feature overlapping an edge of an active region | Electricity | 1 | Active |
| US9799766B2 | High voltage transistor structure and method | Electricity | 1 | Active |
| US11107916B2 | High voltage transistor structure | Electricity | 1 | Active |
| US11705511B2 | Metal-insulator-semiconductor transistors with gate-dielectric/semiconductor interfacial protection layer | Electricity | 0 | Active |
| US10269959B2 | High voltage transistor structure and method | Electricity | 0 | Active |
| US11476325B2 | Semiconductor device | Electricity | 0 | Active |
| US12119384B2 | Semiconductor device having conductive field plate overlapping an edge of an active region | Electricity | 0 | Active |
| US11527624B2 | Method of manufacturing a semiconductor device having a conductive field plate and a first well | Electricity | 0 | Active |
| US11894362B2 | PNP controlled ESD protection device with high holding voltage and snapback | Electricity | 0 | Active |
| US10290714B2 | Transistor structure with field plate for reducing area thereof | Electricity | 0 | Active |
| US11139374B2 | Field-effect transistors with semiconducting gate | Electricity | 0 | Active |
| US10505032B2 | Semiconductor device with III-nitride channel region and silicon carbide drift region | Electricity | 0 | Active |
| US9761494B2 | Semiconductor structure and method of forming the same | Electricity | 0 | Active |
| US9337028B2 | Passivation of group III-nitride heterojunction devices | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.