Dual-port SRAM cell structure

US11145660B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Dian-Sheg Yu · Hsinchu, TW
• Ren-Fen Tsui · Taipei, TW
• Jhon Jhy Liaw · Shanggongguan, TW
• Bing-Chian Lin · Hsinchu, TW

Key dates

• Filing date: Jul 31, 2019
• Grant date: Oct 12, 2021
• Expiry date: Jan 15, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/10

Abstract

A dual-port SRAM includes a substrate, first and second active regions over the substrate and oriented lengthwise generally along a first direction; first and second gate electrodes oriented lengthwise generally along a second direction perpendicular to the first direction. The first and second gate electrodes engage the first and second active regions to form first and second pass gate transistors, respectively. The dual-port SRAM further includes a first gate contact disposed over the first gate electrode and electrically connected to the first gate electrode and a first source/drain contact oriented lengthwise generally along the second direction. The first source/drain contact directly contacts source/drain features of the first and second pass gate transistors. A portion of the first gate contact and a portion of the first source/drain contact are at a same vertical level from a top surface of the substrate and are aligned along the first direction.