Memory arrays and methods used in forming a memory array comprising strings of memory cells
US11152388B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2019 |
| Grant date | Oct 19, 2021 |
| Priority date | — |
| Expiry date | Oct 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.