Cache snooping mode extending coherence protection for certain requests
US11157408B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2019 |
| Grant date | Oct 26, 2021 |
| Priority date | — |
| Expiry date | Dec 17, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory includes a data array, a directory of contents of the data array that specifies coherence state information, and snoop logic that processes operations snooped from a system fabric by reference to the data array and the directory. The snoop logic, responsive to snooping on the system fabric a request of a flush or clean memory access operation of an initiating coherence participant, determines whether the directory indicates the cache memory has coherence ownership of a target address of the request. Based on determining the directory indicates the cache memory has coherence ownership of the target address, the snoop logic provides a coherence response to the request that causes coherence ownership of the target address to be transferred to the initiating coherence participant, such that the initiating coherence participant can protect the target address against conflicting requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.