Static random-access memory cell design
US11158368B2 · kind B2 · utility
2Cited by
0References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2020 |
| Grant date | Oct 26, 2021 |
| Priority date | — |
| Expiry date | Sep 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A six transistor SRAM memory cell design is discussed. An SRAM memory cell includes criss-crossed transistors in cross-coupled inverters to achieve a more compact form factor and simplify fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.