Gallium nitride high electron mobility transistor having high breakdown voltage and formation method therefor
US11158702B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2019 |
| Grant date | Oct 26, 2021 |
| Priority date | — |
| Expiry date | Sep 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gallium nitride high electron mobility transistor and a formation method therefor are provided. The transistor includes: a substrate; a gallium nitride channel layer disposed on the substrate; a first barrier layer disposed on the gallium nitride channel layer; a gate, a source and a drain disposed on the first barrier layer, the source and the drain being respectively disposed on two sides of the gate; and a second barrier layer disposed on a surface of the first barrier layer between the gate and the drain, a side wall of the second barrier layer being connected to a side wall on one side of the gate and being configured to generate two-dimensional hole gas. The high electron mobility transistor has a higher breakdown voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.