Memory device, memory system including memory device and vehicle-based system including memory system
US11163453B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2020 |
| Grant date | Nov 2, 2021 |
| Priority date | — |
| Expiry date | Sep 22, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device comprises a smart buffer, and a memory area divided into a first memory area and a second memory area, wherein the smart buffer comprises a priority setting unit configured to receive a sensing data and a corresponding weight from a controller, determine a priority of the sensing data based on the weight, and classify the sensing data as one of first priority sensing data and second priority sensing data, and a channel controller configured to allocate at least one channel selected from among a plurality of channels to a first channel group, allocate at least another channel selected from among the plurality of channels to a second channel group, assign the first channel group to process the first priority sensing data in relation to the first memory area, and assign the second channel group to process the second priority sensing data in relation to the second memory area, wherein a number of data input/output (I/O) pins connected to the first channel group is greater than a number of data I/O pins connected to the second channel group, wherein the memory area includes at least one memory chip, wherein the at least one memory chip includes a first chip having a firs…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.