Coarse depth test in graphics processing systems
US11164364B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2020 |
| Grant date | Nov 2, 2021 |
| Priority date | — |
| Expiry date | Jun 19, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/20021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and coarse depth test logic perform coarse depth testing in a graphics processing system in which a rendering space is divided into a plurality of tiles. A depth range for a tile is obtained, which identifies a depth range based on primitives previously processed for the tile. A determination is made based on the depth range for the tile as to whether all or a portion of a primitive is hidden in the tile. If at least a portion of the primitive is not hidden in the tile, a determination is as to whether the primitive, or one or more primitive fragments thereof has better depth than the primitives previously processed for the tile according to a depth compare mode. If so, the primitive or the primitive fragment is identified as not requiring a read of a depth buffer to perform full resolution depth testing, such that a determination that at least a portion of the primitive is hidden in the tile causes full resolution depth testing not to be performed on at least that portion of the primitive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.