Patent · US Active

Method for forming nanosheet transistor structures

US11164942B1 · kind B1 · utility

4Cited by

0References

20Claims

0Family size

Assignee

IMEC VZW · BE

Inventors

Pieter Weckx · Bunsbeek, BE
Julien Ryckaert · Schaerbeek - Schaarbeek, BE
Eugenio Dentoni Litta · Leuven, BE

Key dates

Filing date	May 27, 2020
Grant date	Nov 2, 2021
Priority date	—
Expiry date	May 27, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/667
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

According to an aspect of the present inventive concept there is provided a method for forming a first and a second nanosheet transistor structure, each comprising a source, a drain, and a channel extending between the source and the drain in a first direction, and a gate extending across the channel, wherein the first and second nanosheet transistor structures are spaced apart in a second direction, transverse to the first direction, by an insulating wall extending in the first direction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.