Simulation method for use in functional equivalence check
US11170147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2019 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Oct 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A function equivalence check method includes receiving a cell list, receiving an analog constraint of a cell in the cell list, generating the full-coverage input stimuli according to the analog constraint, performing a behavioral-level simulation using the full-coverage input stimuli and according to the behavioral code to generate a behavioral-level simulation result, performing a circuit-level simulation using the full-coverage input stimuli and according to the circuit-level netlist to generate a circuit-level simulation result, and comparing the behavioral-level simulation result and the circuit-level simulation result to generate a comparison report for an analog value auto-comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.