Power-on-reset circuit and corresponding electronic device
US11171644B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 19, 2021 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Mar 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/226
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment power-on-reset circuit, having a power supply input to receive a power supply voltage, generates a reset signal with a value switching upon the power supply voltage crossing a POR detection level. The power-on-reset circuit has: a PTAT stage having a left branch and a right branch and generating a current equilibrium condition between the currents circulating in the left and right branches upon the power supply voltage reaching the POR detection level; and an output stage coupled to the PTAT stage and generating the reset signal, with the value switching at the occurrence of the current equilibrium condition for the PTAT stage. The power-on-reset circuit further comprises a detection-level generation stage, coupled to the PTAT stage as a central branch thereof to define the value of the POR detection level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.