Reversible logic circuit and operation method thereof
US11171650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2019 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Jul 16, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reversible logic circuit and an operation method thereof are provided. The logic circuit includes resistive switching cells, word lines, and bit lines. The word lines and the bit lines are perpendicular to each other. The anode of a resistive switching cell is connected to the word line as a first input terminal to apply logic operating voltage or be grounded. The cathode of a resistive switching cell is connected to the bit line as a second input terminal to apply logic operating voltage or be grounded. When performing reversible logic operation, four levels of resistance states of the resistive switching cell are used as logic outputs to implement single-input NOT and dual-input C-NOT reversible logic functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.