Resistive random access memory and resetting method thereof
US11176996B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2020 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | May 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a resistive random access memory (RRAM) including at least one memory cell. The at least one memory cell includes a top electrode, a bottom electrode, a data storage layer, an oxygen gettering layer, a first barrier layer, and an oxygen supplying layer. The data storage layer is disposed between the top electrode and the bottom electrode. The oxygen gettering layer is disposed between the data storage layer and the top electrode. The first barrier layer is disposed between the oxygen gettering layer and the data storage layer. The oxygen supplying layer is disposed between the oxygen gettering layer and the top electrode and/or between the oxygen gettering layer and the first barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.