Patent · US Active

Memory array accessibility

US11182085B2 · kind B2 · utility

1Cited by

159References

20Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Daniel B. Penney · Wylie, US
Gary L. Howe · Allen, US

Key dates

Filing date	Aug 29, 2019
Grant date	Nov 23, 2021
Priority date	—
Expiry date	Jan 29, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/1006
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Apparatuses and methods for memory array accessibility can include an apparatus with an array of memory cells. The array can include a first portion accessible by a controller of the array and inaccessible to devices external to the apparatus. The array can include a second portion accessible to the devices external to the apparatus. The array can include a number of registers that store row address that indicate which portion of the array is the first portion. The apparatus can include the controller configured to access the number of registers to allow access to the second portion by the devices external to the apparatus based on the stored row addresses.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.