Semiconductor device for selectively performing isolation function and layout displacement method thereof
US11183233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2019 |
| Grant date | Nov 23, 2021 |
| Priority date | — |
| Expiry date | Sep 10, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.