Patent · US Active

Memory controller and method of operating the same

US11188458B2 · kind B2 · utility

0Cited by
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20Claims
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Assignee

Inventors

Key dates

Filing dateDec 3, 2019
Grant dateNov 30, 2021
Priority date
Expiry dateDec 19, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7208
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The memory controller controls at least one memory device including a plurality of stream storage areas. The memory controller comprises a buffer, a write history manager, a write controller, and a garbage collection controller. The buffer stores write data. The write history manager stores write count values for each of the plurality of stream storage areas and generates write history information indicating a write operation frequency for each of the plurality of stream storage areas based on the write count values. The write controller controls the at least one memory device to store the write data provided from the buffer. The garbage collection controller controls the at least one memory device to perform a garbage collection operation on a target stream storage area selected from among the plurality of stream storage areas based on the write history information.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.