Patent · US Active

System and method for cache directory TCAM error detection and correction

US11188480B1 · kind B1 · utility

0Cited by
2References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 12, 2020
Grant dateNov 30, 2021
Priority date
Expiry dateMay 12, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1021
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods are provided for addressing die are inefficiencies associated with the use of redundant ternary content-addressable memory (TCAM) for facilitating error detection and correction. Only a portion of redundant TCAMs (or portions of the same TCAM) are reserved for modified coherency directory cache entries, while remaining portions are available for unmodified coherency directory cache entries. The amount of space reserved for redundant, modified coherency directory cache entries can be programmable and adaptable.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.