Inventor · Chippewa Falls, WI, US

Thomas Edward McGee

23Patents
4h-index
17Co-inventors
60Inventor score

Filing activity: Nov 27, 2000 → May 11, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7447794B1 System and method for conveying information Physics 27 Expired
US6729326B1 Neonatal valved manifold Human Necessities 14 Expired
US7533208B2 Hot plug control apparatus and method Physics 6 Active
US11573898B2 System and method for facilitating hybrid hardware-managed and software-managed cache coherency for distributed computing Physics 6 Active
US7873741B2 System and method for conveying information Physics 3 Active
US7868656B2 Hot plug control apparatus and method Physics 2 Active
US8327015B2 System and method for conveying information Physics 2 Active
US10970213B2 Selective disabling of hardware-based cache coherency and enforcement of software-based cache coherency Physics 1 Active
US8892805B2 High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function Emerging Cross-Sectional Technologies 1 Active
US8812721B2 System and method for conveying information Physics 1 Active
US7490604B2 Endotracheal surfactant distribution system Human Necessities 1 Expired
US11586541B2 System and method for scalable hardware-coherent memory nodes General 0 Revoked
US11687459B2 Application of a default shared state cache coherency protocol Physics 0 Active
US11188480B1 System and method for cache directory TCAM error detection and correction Physics 0 Active
US11556471B2 Cache coherency management for multi-category memories Physics 0 Active
US10521260B2 Workload management system and process Electricity 0 Active
US12061552B2 Application of a default shared state cache coherency protocol Physics 0 Active
US9122816B2 High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function Emerging Cross-Sectional Technologies 0 Active
US12282662B2 Chassis servicing and migration in a scale-up NUMA system Physics 0 Active
US11714755B2 System and method for scalable hardware-coherent memory nodes Physics 0 Active
US10372638B2 Interconnect agent Physics 0 Active
US9654142B2 System and method for conveying information Physics 0 Active
US11314637B2 System and method for efficient cache coherency protocol processing Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.