Patent · US Active

Decoder for irregular error correcting codes

US11190219B1 · kind B1 · utility

0Cited by

0References

20Claims

0Family size

Assignee

Western Digital Technologies, Inc. · US

Inventors

Ran Zamir · Ramat Gan, IL
Dudy David Avraham · Even Yehuda, IL
Eran Sharon · Rishon LeZion, IL
Idan Alrod · Herzliya, IL
Idan Goldenberg · Ramat HaSharon, IL
Omer Fainzilber · Kfar Sava, IL
Yuri Ryabinin · Beer Sheva, IL
Yan Dumchin · Beer Sheva, IL
Igal Mariasin · Beer Sheva, IL
Eran Banani · Meitar, IL

Key dates

Filing date	Jun 30, 2020
Grant date	Nov 30, 2021
Priority date	—
Expiry date	Jun 30, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/616
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An error correcting code (ECC) decoder for a non-volatile memory device is configured to decode data stored by the non-volatile memory device using a parity check matrix with columns of different column weights. The ECC decoder is further configured to artificially slow processing of one or more of the columns of the parity check matrix in response to column weights for the one or more columns satisfying a threshold.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.