Patent · US Active

Method for preparing silicon wafer with rough surface and silicon wafer

US11192782B1 · kind B1 · utility

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1References
9Claims
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Key dates

Filing dateSep 1, 2020
Grant dateDec 7, 2021
Priority date
Expiry dateSep 1, 2040

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB81C2201/115
  • WIPO fieldMicro-structural and nano-technology
  • WIPO sectorChemistry

Abstract

Provided are a method for preparing a silicon wafer with a rough surface and a silicon wafer, for solving the problem that a viscous force is likely to be generated when a smooth surface of the silicon wafer approaches another film layer. The method includes: depositing a porous oxide film layer on a surface of the first silicon planar layer that has been subjected to planar planarization, and then etching the porous oxide film layer by XeF2 vapor etching, during which XeF2 gas passes through the porous oxide film layer to etch the first silicon planar layer in an irregular way. Therefore, the first silicon planar layer has a greater surface roughness. When the silicon wafer approaches to another film layer, the viscous force generated therebetween is reduced, improving the sensitivity of the MEMS device and reducing the probability of out-of-work MEMS devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.