Tunneling metamagnetic resistance memory device and methods of operating the same
US11200934B2 · kind B2 · utility
2Cited by
11References
19Claims
0Family size
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Key dates
| Filing date | Apr 20, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Apr 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetoresistive memory device includes a first electrode, a second electrode, and a layer stack located between the first electrode and the second electrode. The layer stack may include a ferroelectric material layer and a metamagnetic tunnel junction containing a metamagnetic material layer, an insulating barrier layer, and a metallic material layer. Alternatively, the layer stack may include a multiferroic material layer, the metamagnetic material layer, the insulating barrier layer, and a reference magnetization layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.