Semiconductor memory device
US11200951B2 · kind B2 · utility
2Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2019 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Mar 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes a plurality of memory cells; a first circuit configured to convert first data into second data relating to an order of thresholds of the memory cells; and a second circuit configured to perform a write operation on the memory cells based on the second data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.