Semiconductor device including saturation current suppression layer
US11201239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Mar 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.