Semiconductor substrate
US11211307B2 · kind B2 · utility
0Cited by
0References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2019 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Feb 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49822
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
A semiconductor substrate includes a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer. The dielectric insulation layer includes a first material having a thermal conductivity of between 25 and 180 W/mK, and an insulation strength of between 15 and 50 kV/mm, and an electrically conducting or semiconducting second material evenly distributed within the first material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.