Integrated circuit including transistors having a common base
US11211428B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Nov 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/826
Abstract
The disclosure relates to integrated circuits including one or more rows of transistors and methods of forming rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a first semiconductor layer having a plurality of first conduction regions, a second semiconductor layer having a second conduction region, a common base between the first semiconductor layer and the second semiconductor layer, and a plurality of insulator walls extending in a first direction. The first conduction regions are separated from one another by the insulator walls. The integrated circuit further includes an insulating trench extending in a second direction and in contact with each of the bipolar transistors of the row of bipolar transistors. A conductive layer is coupled to the base, and the conductive layer extends through the insulator walls and extends at least partially into the insulating trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.