Memory system and operation method thereof
US11216326B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2019 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Mar 13, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system may include: one or more normal memory regions; one or more spare memory regions; and a controller suitable for controlling the normal memory regions and the spare memory regions. The controller may determine, among the normal memory regions, a first normal cell region that includes a concentrated cell region whose access count exceeds a first threshold and neighboring cell regions in a set range from the concentrated cell region perform first address mapping to map an address of the first normal cell region to an address of a first spare cell region in the spare memory regions, and perform second address mapping to map the address of the first spare cell region to an address of a second normal cell region in the normal memory regions, when an access count of the first spare cell region exceeds a second threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.