Persistent memory write semantics on PCIe with existing TLP definition
US11216396B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2016 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Mar 17, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure are directed to systems, methods, and devices that include an application processor. The application processor includes an interface logic to interface with a communication module using a bidirectional interconnect link compliant with a peripheral component interconnect express (PCIe) protocol. The interface logic to receive a data packet from across the link, the data packet comprises a header and data payload; determine a hint bit set in the header of the data packet; determine a steering tag value in the data packet header based on the hint bit set; and transmit the data payload to non-volatile memory based on the steering tag set in the header.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.