Incremental authentication for memory constrained systems
US11216591B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2019 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Nov 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/3249
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus and associated methods relate to authenticating a back-to-front-built configuration image. In an illustrative example, a circuit may include memory configured to store a signature S, a second hash H2, and a first data chunk C1. Signature S may be signed on a first hash H1. H1 may be the hash for H2 and C1. If signature S passes verification, a hash engine may perform hash functions on C1 and H2 to generate a hash H1′. H1′ may be compared with H1 to indicate whether C1 has been tampered with or not. By using the incremental authentication, a signature that appears at the beginning of the image may be extended to the entire image while only using a small internal buffer. Advantageously, internal buffer may only need to store two hashes Hi, Hi+1, and a data chunk Ci, or, a signature S, a hash Hi, and a data chunk Ci.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.