Method for forming semiconductor device with resistive element
US11217482B2 · kind B2 · utility
3Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2019 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Dec 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a conductive line in the dielectric layer. The method also includes forming an etch stop layer over the dielectric layer and the conductive line and patterning the etch stop layer to form a contact opening exposing a portion of the conductive line. The method further includes forming a resistive layer over the etch stop layer, wherein the resistive layer extends into the contact opening. In addition, the method includes patterning the resistive layer to form a resistive element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.