Unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls

US11217582B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Walid M. Hafez · Portland, US
• Sridhar Govindaraju · Hillsboro, US
• Mark Liu · West Linn, US
• Szuya S. Liao · Portland, US
• Chia-Hong Jan · Portland, US
• Nick Lindert · Beaverton, US
• Christopher KENYON · Portland, US
• Sairam Subramanian · Dallas, US

Key dates

• Filing date: Mar 30, 2018
• Grant date: Jan 4, 2022
• Expiry date: Apr 20, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0144
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls, and methods of fabricating unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls, are described. In an example, integrated circuit structure includes a first semiconductor fin having a cut along a length of the first semiconductor fin. A second semiconductor fin has a cut along a length of the second semiconductor fin. A gate endcap isolation structure is between the first semiconductor fin and the second semiconductor fin. The gate endcap isolation structure has a substantially uniform width along the lengths of the first and second semiconductor fins.