Performing noise cancellation on a memory device using a neural network
US11221769B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2019 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | Feb 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/563
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory device, and a memory controller including a processor and an internal memory. A computer program including a neural network is stored in the memory system. The processor executes the computer program to extract a voltage level from each of a plurality of memory cells connected to one string select line (SSL), in which the memory cells and the SSL are included in a memory block of the memory device, provide the voltage levels as input to the neural network, and perform noise cancellation on the SSL, using the neural network, by changing at least one of the voltage levels from a first voltage level to a second voltage level. The first voltage level is classified into a first cluster of memory cells, and the second voltage level is classified into a second cluster of memory cells different from the first cluster.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.