Inventor · Suwon-si, KR

Amit Berman

62Patents

3h-index

25Co-inventors

62Inventor score

Filing activity: Aug 16, 2011 → Dec 26, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US11581906B1	Hierarchical error correction code decoding using multistage concatenated codes	Electricity	5	Active
US10372534B2	Method of operating memory device using a compressed party difference, memory device using the same and memory system including the device	Electricity	4	Active
US11205498B1	Error detection and correction using machine learning	Electricity	3	Active
US11387848B1	Hierarchical error correction code	Electricity	3	Active
US9607696B2	Minimal maximum-level programming	Physics	3	Active
US10573390B1	High-density storage system	Physics	2	Active
US11855658B1	Efficient hard decision decoding of generalized Reed-Solomon codes in presence of erasures and errors within the singleton bound	Electricity	2	Active
US11115055B2	Method and apparatus for encoding and decoding data in memory system	Electricity	2	Active
US11184026B2	Super-HPC error correction code	Electricity	1	Active
US11626168B2	De-noising using multiple threshold-expert machine learning models	Physics	1	Active
US11742879B2	Machine-learning error-correcting code controller	Electricity	1	Active
US11791840B1	Hard decision decoding of non-volatile memory using machine learning	Electricity	1	Active
US10521339B2	Retired page utilization (RPU) for improved write capacity of solid state drives	Physics	1	Active
US11221769B2	Performing noise cancellation on a memory device using a neural network	Physics	1	Active
US11689216B1	Low gate-count generalized concatenated code (GCC) by online calculation of syndromes instead of buffer	Electricity	1	Active
US10726879B2	Low-power data transfer from buffer to flash memory	Physics	1	Active
US10650889B1	Energy efficient phase change random access memory cell array write via controller-side aggregation management	Physics	1	Active
US11031956B2	Generalized concatenated error correction coding scheme with locality	Electricity	1	Active
US10866858B2	Memory systems having reduced memory channel traffic and methods for operating the same	Physics	1	Active
US9229804B2	Mitigating inter-cell coupling effects in non volatile memory (NVM) cells	Physics	1	Active
US10922025B2	Nonvolatile memory bad row management	Physics	1	Active
US12388468B2	Generalized hierarchical concatenated codes with fixed dimension and code length	Electricity	0	Active
US11573715B2	Memory cell level assignment using optimal level permutations in a non-volatile memory	Physics	0	Active
US11711099B1	Low gate-count encoding algorithm and hardware of flexible rate GLDPC ECC	Electricity	0	Active
US12267086B2	High throughput polar codeword decoding by decoding bch sub-code in polar code structure	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.