Patent · US Active

Sort and merge instruction for a general-purpose processor

US11221850B2 · kind B2 · utility

0Cited by
48References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2020
Grant dateJan 11, 2022
Priority date
Expiry dateSep 30, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/30192
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.