Mark S. Farrell
166Patents
20h-index
121Co-inventors
93Inventor score
Filing activity: Jul 29, 1987 → Apr 7, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4843541A | Logical resource partitioning of a data processing system | Physics | 348 | Expired |
| US7200704B2 | Virtualization of an I/O adapter port using enablement and activation functions | Physics | 121 | Expired |
| US7234037B2 | Memory mapped Input/Output operations | Physics | 67 | Expired |
| US6119219A | System serialization with early release of individual processor | Physics | 60 | Expired |
| US7606965B2 | Information handling system with virtualized I/O adapter ports | Physics | 56 | Active |
| US6079013A | Multiprocessor serialization with early release of processors | Physics | 53 | Expired |
| US7197585B2 | Method and apparatus for managing the execution of a broadcast instruction on a guest processor | Physics | 50 | Expired |
| US8626970B2 | Controlling access by a configuration to an adapter function | Physics | 32 | Active |
| US5694617A | System for prioritizing quiesce requests and recovering from a quiescent state in a multiprocessing system with a milli-mode operation | Physics | 27 | Expired |
| US7356725B2 | Method and apparatus for adjusting a time of day clock without adjusting the stepping rate of an oscillator | Physics | 27 | Expired |
| US6044454A | IEEE compliant floating point unit | Physics | 26 | Expired |
| US8176279B2 | Managing use of storage by multiple pageable guests of a computing environment | Physics | 25 | Active |
| US9286076B2 | Intra-instructional transaction abort handling | Physics | 25 | Active |
| US9280448B2 | Controlling operation of a run-time instrumentation facility from a lesser-privileged state | Physics | 24 | Active |
| US8364912B2 | Use of test protection instruction in computing environments that support pageable guests | Physics | 23 | Active |
| US7984275B2 | Computer configuration virtual topology discovery and instruction therefore | Physics | 23 | Active |
| US5802359A | Mapping processor state into a millicode addressable processor state register array | Physics | 23 | Expired |
| US7739434B2 | Performing a configuration virtual topology change and instruction therefore | Physics | 22 | Active |
| US8195986B2 | Method, system and computer program product for processing error information in a system | Physics | 21 | Active |
| US7552436B2 | Memory mapped input/output virtualization | Physics | 20 | Active |
| US5790844A | Millicode load and test access instruction that blocks interrupts in response to access exceptions | Physics | 20 | Expired |
| US6058470A | Specialized millicode instruction for translate and test | Physics | 20 | Expired |
| US9250902B2 | Determining the status of run-time-instrumentation controls | Physics | 18 | Active |
| US5748951A | Specialized millicode instructions which reduce cycle time and number of instructions necessary to perform complex operations | Physics | 17 | Expired |
| US7734900B2 | Computer configuration virtual topology discovery and instruction therefore | Physics | 15 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.