Patent · US Active

Low current, wide range input common mode LVDS receiver devices and methods

US11223354B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

STMicroelectronics International N.V. · NL

Inventors

Paras Garg · Noida, IN
Ankit Agrawal · Greater Noida, IN
Sandeep Kaushik · Bengaluru, IN

Key dates

Filing date	Aug 21, 2020
Grant date	Jan 11, 2022
Priority date	—
Expiry date	Aug 21, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/018507
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Low-voltage differential signaling (LVDS) receiver circuits, electronic devices, and methods are provided. A LVDS receiver includes an input differential pair of transistors that receive a differential input signal. The input differential pair includes a first NMOS transistor that receives a first input signal and a second NMOS transistor that receives a second input signal. A third NMOS transistor has source and drain terminals respectively coupled to source and drain terminals of the first NMOS transistor, and a fourth NMOS transistor has source and drain terminals respectively coupled to source and drain terminals of the second NMOS transistor. A first level shifter is coupled to a gate of the third NMOS transistor, and a second level shifter is coupled to a gate of the fourth NMOS transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.