Semiconductor package
US11227835B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2019 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Feb 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a frame having first and second surfaces opposite to each other, having first and second through holes, and including a wiring structure connecting the first and second surfaces, a connection structure disposed on the first surface of the frame and having a redistribution layer connected to the wiring structure, a first semiconductor chip having a first surface having a first pad connected to the redistribution layer and a second surface opposite to the first surface and having a second pad, a second semiconductor chip having an active surface having a connection pad connected to the redistribution layer and an inactive surface opposite to the active surface, an encapsulant encapsulating the first and second semiconductor chips, and a wiring layer connected to the second pad of the first semiconductor chip and the wiring structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.